Cadence Printed Circuit Board Has New Features
Cadence Design Systems has released its Cadence Allegro and OrCAD printed circuit board (PCB) software with a range of new features. The Allegro and OrCAD PCB Design Release 16.3 allows engineers to miniaturise the footprint of their end product and reduce the number of physical prototype iterations. This release addresses increased functional and interconnect density through improvements for rigid-flex routing, extended high-density interconnect (HDI) rules, 3D viewing of PCBs and asymmetrical clearance for RF circuits.
Extended micro via stacking rules allow users to create the most difficult HDI designs, while multi-line curved bus routing that hugs the flex outline accelerates the creation of rigid-flex designs. An integrated 3D PCB viewer gives designers visibility into components and HDI micro via breakouts, eliminating unnecessary iterations with mechanical design teams. The Allegro PCB RF Option also helps engineers to reduce the time taken to create accurate RF circuits through the use of asymmetrical clearances for one or more RF elements.
Also featured in the 16.3 release are a number of productivity and usability improvements to the OrCAD range of products. OrCAD Capture CIS offers autowire capability to quickly add connections, as well as 3D footprint viewing. OrCAD PCB Editor provides 3D viewing and flip-board design/editing and jumper support for single-sided PCB designs. OrCAD Signal Explorer has a revamped user interface, with drag-and-drop and copy-and-paste functionality, context-sensitive RMB functions and native IBIS model support. Usability improvements are another focus of the software, which offers a user interface and adds stack-up-aware capabilities to the pre-route analysis environment.
Buffer modelling standards are embraced through native IBIS and SPICE support, including Cadence Virtuoso Spectre Circuit Simulator models. Another improvement that boosts design cycle management is the ability to quickly scan a PCB with dozens of multi-gigabit signals and quickly determine where detailed analysis should be applied as signals are ranked according to their signal-to-noise ratio. Other key issues addressed are associated with part data management.
Integrated ECAD, MCAD part creation, generation and distribution reduce unnecessary physical prototype iterations. The part introduction capability extends management, notification of pre-release and temporary parts to shrink the design cycle. Engineers can implement part updates automatically based on approved, recommended replacements, ensuring quality of results through obsolete part tracking.
Cadence Design Systems has released its Cadence Allegro and OrCAD printed circuit board (PCB) software with a range of new features. The Allegro and OrCAD PCB Design Release 16.3 allows engineers to miniaturise the footprint of their end product and reduce the number of physical prototype iterations. This release addresses increased functional and interconnect density through improvements for rigid-flex routing, extended high-density interconnect (HDI) rules, 3D viewing of PCBs and asymmetrical clearance for RF circuits.
Extended micro via stacking rules allow users to create the most difficult HDI designs, while multi-line curved bus routing that hugs the flex outline accelerates the creation of rigid-flex designs. An integrated 3D PCB viewer gives designers visibility into components and HDI micro via breakouts, eliminating unnecessary iterations with mechanical design teams. The Allegro PCB RF Option also helps engineers to reduce the time taken to create accurate RF circuits through the use of asymmetrical clearances for one or more RF elements.
Also featured in the 16.3 release are a number of productivity and usability improvements to the OrCAD range of products. OrCAD Capture CIS offers autowire capability to quickly add connections, as well as 3D footprint viewing. OrCAD PCB Editor provides 3D viewing and flip-board design/editing and jumper support for single-sided PCB designs. OrCAD Signal Explorer has a revamped user interface, with drag-and-drop and copy-and-paste functionality, context-sensitive RMB functions and native IBIS model support. Usability improvements are another focus of the software, which offers a user interface and adds stack-up-aware capabilities to the pre-route analysis environment.
Buffer modelling standards are embraced through native IBIS and SPICE support, including Cadence Virtuoso Spectre Circuit Simulator models. Another improvement that boosts design cycle management is the ability to quickly scan a PCB with dozens of multi-gigabit signals and quickly determine where detailed analysis should be applied as signals are ranked according to their signal-to-noise ratio. Other key issues addressed are associated with part data management.
Integrated ECAD, MCAD part creation, generation and distribution reduce unnecessary physical prototype iterations. The part introduction capability extends management, notification of pre-release and temporary parts to shrink the design cycle. Engineers can implement part updates automatically based on approved, recommended replacements, ensuring quality of results through obsolete part tracking.
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