Synopsys Introduces Galaxy Constraint Analyzer Synopsys has unveiled the Galaxy Constraint Analyzer tool, which improves designer productivity through look-ahead constraint analysis technology tuned for the Synopsys Galaxy Implementation Platform. The Galaxy Constraint Analyzer enables designers to quickly assess the correctness and consistency of timing constraints. Correctness and consistency lead to more efficient runtimes in Synopsys's Design Compiler synthesis and IC Compiler physical implementation tools, according to the company. The Galaxy Constraint Analyzer features constraint debug capabilities to help designers eliminate long 'trial-and-error iterations' during implementation, reducing design cost as a result of more predictable schedules all the way to full-chip sign-off. Hitoshi Sugihara, department manager of the DFM and Digital EDA Technology Development Department in the Design Technology Division of Renesas Technology Corporation, said: 'Our compl...
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